The disclosed embodiments of the present invention relate to converting an analog signal into a digital signal, and more particularly, to a delta-sigma analog-to-digital converter with error suppression.
Analog techniques have dominated signal processing for years, but digital techniques are encroaching into this domain. An analog-to-digital converter is needed to convert an analog signal into a digital signal, thus allowing the signal to be processed in a digital domain. For example, a delta-sigma analog-to-digital converter (ΔΣ ADC) may be used for converting analog signals over a wide range of frequencies, from DC (direct current) to several megahertz. In general, a core part of the delta-sigma analog-to-digital converter is a delta-sigma modulator which is responsible for digitizing the analog input signal and reducing noise at lower frequencies. In this stage, the architecture implements a function called noise shaping that pushes low-frequency noise (e.g., quantization noise) up to higher frequencies outside the in-band (i.e., the band of interest). Noise shaping is one of the reasons that the delta-sigma analog-to-digital converters are well-suited for low-frequency, higher-accuracy applications.
The delta-sigma modulator is composed of an adder (which may be implemented using an operational amplifier to perform signal subtraction), a loop filter, an ADC, and a digital-to-analog converter (DAC). The DAC is located at a feedback path between an input node of the adder and an output node of the ADC. Thus, an error of the DAC is injected into the adder, and may be regarded as an input signal of the delta-sigma modulator. As a result, the DAC error can not be suppressed via noise shaping of the delta-sigma modulator. Thus, an error suppression mechanism is needed to mitigate the effect caused by an error injected into the input of the delta-sigma modulator.